Journal article

Bit-Width Constrained Memory Hierarchy Optimization for Real-Time Video Systems

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Author list: THÖRNBERG B, O'NILS M, OLSSON L, THÖRNBERG B, OLSSON L, O'NILS M

Publication year: 2007

Start page: 781

End page: 800

Number of pages: 20

ISSN: 0278-0070

DOI: http://dx.doi.org/10.1109/TCAD.2006.884569

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Abstract

The great variety of pixel dynamics of real-time video processing systems, ranging from color, grayscale or binary pixels, means that a careful design and specification of bit-widths is required. It is obvious that the bit-width specification will affect the total memory storage requirement. However, what is not so obvious is that the bit-width specification will also affect the design of the memory hierarchy, an impact similar for both hardware and software implementations. We have developed an Integer Non Linear Program (INLP) formulation for the optimization of the memory hierarchy of real-time video processing systems. An active surveillance video camera is introduced as a test case. We demonstrate how the optimization model can reduce the on-chip memory storage by 61 percent compared to a non optimal memory hierarchy.


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